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Activity 2.2.2 — Universal Gates (NAND & NOR)


Learning Objectives

By the end of this lesson, students will be able to:

  1. Describe the operation and truth tables of NAND and NOR gates
  2. Explain why NAND and NOR gates are called "universal" gates
  3. Implement any Boolean function using only NAND gates or only NOR gates
  4. Apply the bubble pushing technique to analyze and convert circuits

Vocabulary

Vocabulary (click to expand)
Term Definition
NAND Gate "NOT-AND" — an AND gate followed by a NOT inverter; output is LOW only when ALL inputs are HIGH
NOR Gate "NOT-OR" — an OR gate followed by a NOT inverter; output is HIGH only when ALL inputs are LOW
Universal Gate A gate type that can be used to implement any Boolean function (NAND and NOR are universal)
Bubble Pushing A technique where inversions (bubbles) are propagated through a circuit to simplify gate implementations
Active-LOW A signal that is considered "ON" or "active" when it is at logic 0 (LOW voltage)
Active-HIGH A signal that is considered "ON" or "active" when it is at logic 1 (HIGH voltage)

Part 1: Introduction to NAND and NOR Gates

While AND, OR, and NOT gates are fundamental building blocks, there are two other gates that are incredibly important in digital electronics: NAND and NOR.

These gates are called "universal" because they can be combined to create ANY other gate type, including AND, OR, and NOT. This makes them especially useful in integrated circuit (IC) design.


Part 2: NAND Gate

The NAND gate is an AND gate followed by an inverter (NOT gate).

Symbol and Truth Table

NAND Gate Symbol

Y = (A · B)' — Output is LOW only when ALL inputs are HIGH

SVG diagram coming soon

A B Y (A NAND B)
0 0 1
0 1 1
1 0 1
1 1 0

Key Behavior: The output is LOW (0) only when ALL inputs are HIGH (1). All other combinations give HIGH output.

Boolean Expression

Y = (A · B)' — read as "A AND B, NOT" or "NOT of A AND B"

Key insight: NAND is called "negative-AND" — think of it as "NOT all inputs HIGH."


Part 3: NOR Gate

The NOR gate is an OR gate followed by an inverter (NOT gate).

Symbol and Truth Table

NOR Gate Symbol

Y = (A + B)' — Output is HIGH only when ALL inputs are LOW

SVG diagram coming soon

A B Y (A NOR B)
0 0 1
0 1 0
1 0 0
1 1 0

Key Behavior: The output is HIGH (1) only when ALL inputs are LOW (0). All other combinations give LOW output.

Boolean Expression

Y = (A + B)' — read as "A OR B, NOT" or "NOT of A OR B"

Key insight: NOR is called "negative-OR" — think of it as "NOT any input HIGH."


Part 4: Why NAND and NOR Are Universal

Any Boolean function can be implemented using ONLY NAND gates OR ONLY NOR gates. This is incredibly useful because:

  1. Manufacturing efficiency: NAND and NOR gates are the simplest gates to manufacture in silicon
  2. Cost reduction: Using only one type of gate reduces IC complexity
  3. Flexibility: A single NAND or NOR IC can implement any logic function

Building Basic Gates with NAND

NAND gates can be combined to create NOT, AND, and OR gates:

Function NAND Implementation How it works
NOT Tie both inputs together: NAND(A,A) When A=0, output=1. When A=1, output=0
AND NAND followed by NOT: (A NAND B)' Double inversion cancels out
OR Invert both inputs then NAND: NAND(A',B') De Morgan's: (A'·B')' = A+B

The key insight: NAND with inverted inputs becomes OR:

(A NAND B)' = (A' · B')' = A + B  [De Morgan's Theorem]

So to build OR from NAND: - Invert each input first (using NAND as NOT) - Then NAND the results

Building Basic Gates with NOR

Similarly, NOR gates can create all basic functions:

Function NOR Implementation
NOT NOR with inputs tied together
OR NOR followed by NOT
AND NOR with inverted inputs

Key insight: The dual relationship: NAND creates OR when you invert inputs; NOR creates AND when you invert inputs.


Part 5: Bubble Pushing Technique

Bubble pushing is a systematic method to convert AND-OR-Invert (AOI) circuits to NAND-only or NOR-only implementations.

The Basic Idea

  1. Identify bubbles: Find all inversion bubbles (circles) in the circuit
  2. Propagate: Push each bubble through gates in the direction of signal flow
  3. Compensate: Add bubbles where needed to maintain the original logic
  4. Convert: Replace standard gates with NAND or NOR equivalents

Bubble Pushing Rules

  • A bubble on an input compensates a bubble on an output (and vice versa)
  • Two consecutive bubbles cancel out (represent double negation)
  • When pushing a bubble through an AND gate, it becomes NAND
  • When pushing a bubble through an OR gate, it becomes NOR

Example: Converting AND-OR to NAND

Original circuit: F = A·B + C·D

[A]---AND---[F]
[C]---OR----[F]

Process: 1. Add bubbles to the AND outputs 2. Add compensating bubbles to OR inputs 3. Convert OR with bubble to NAND

Result: Equivalent NAND-only circuit


Part 6: Worked Examples

Example 1: Implementing NOT using NAND

Problem: Show how to create a NOT gate using only NAND gates.

Solution: - Tie both inputs of a NAND gate together - When A = 0: NAND(0,0) = (0·0)' = 0' = 1 - When A = 1: NAND(1,1) = (1·1)' = 1' = 0

This behaves exactly like a NOT gate!

Example 2: Implementing OR using NAND

Problem: Show how to create an OR gate using only NAND gates.

Solution: - First, invert each input using NAND with tied inputs (NOT gates) - Then, NAND the results

Circuit: A' → NAND ← B' - NAND(A', B') = (A' · B')' = A + B (De Morgan's)

Example 3: Implementing AND using NOR

Problem: Show how to create an AND gate using only NOR gates.

Solution: - First, invert each input using NOR with tied inputs (NOT gates) - Then, NOR the results

Circuit: A' → NOR ← B' - NOR(A', B') = (A' + B')' = A · B (De Morgan's)

Example 4: Complete Circuit Conversion

Problem: Implement F = A·B + C using only NAND gates.

Step 1: Draw original circuit (AOI)

A → AND →           \
                       OR → F
C →─────────────→ /

Step 2: Convert to NAND: - Add bubbles at AND outputs - Add compensating bubbles at OR inputs - Replace gates with NAND equivalents

Step 3: Final NAND-only circuit

F = ((A·B)')' · C' )' (after bubble pushing and simplification)


Practice Problem — Universal Gate Implementation

Problem 1: Implement the function F = A + B using only NAND gates. Draw the circuit diagram.

Show Solution

Solution: 1. Invert A and B using NAND with tied inputs: A' and B' 2. NAND the results: (A' · B')' 3. Apply De Morgan's: = A + B

Circuit:

A → NAND →\ 
           NAND → F
B → NAND →/

(Each NAND with tied inputs acts as NOT)


Problem 2: Implement F = A · B using only NOR gates.

Show Solution

Solution: 1. Invert A and B using NOR with tied inputs: A' and B' 2. NOR the results: (A' + B')' 3. Apply De Morgan's: = A · B

Circuit:

A → NOR →\ 
           NOR → F
B → NOR →/


Problem 3: Identify what gate is represented by each circuit:

a) Two NAND gates in series with inputs tied together b) Two NOR gates in series with inputs tied together

Show Solution

a) NAND → NAND with tied inputs: - First NAND acts as NOT: (A·A)' = A' - Second NAND: (A'·A')' = (A')' = A - Result: Buffer (non-inverting) or NOT followed by NOT = identity

b) Two NORs with tied inputs act similarly: - First NOR: (A+A)' = A' - Second NOR: (A'+A')' = A - Result: Buffer (identity function)

Actually, let me reconsider: With tied inputs, NAND is NOT, NOR is NOT. Two NOTs in series = original signal. So both represent a BUFFER (non-inverting wire).


Summary

  • NAND gate: AND followed by NOT; output LOW only when ALL inputs HIGH
  • NOR gate: OR followed by NOT; output HIGH only when ALL inputs LOW
  • NAND and NOR are universal gates — any Boolean function can be implemented using only NAND or only NOR
  • Bubble pushing is a technique to convert AOI circuits to NAND-only or NOR-only implementations
  • De Morgan's theorems are essential for understanding the duality between NAND/NOR and AND/OR

Key Reminders

  • NAND: Think "NOT ALL" — output is 0 only when all inputs are 1
  • NOR: Think "NOT ANY" — output is 1 only when all inputs are 0
  • To create NOT from NAND/NOR: tie inputs together
  • To create OR from NAND: invert inputs first, then NAND
  • To create AND from NOR: invert inputs first, then NOR

Custom activity — adapted from PLTW Digital Electronics