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Activity 3.2.2 β€” Counter Applications & Now Serving Display


Learning Objectives

By the end of this lesson, students will be able to:

  1. Explain real-world applications of counters in digital systems
  2. Design a 2-digit counter (00-99) using cascaded counters
  3. Connect counters to 7-segment displays using decoder ICs
  4. Implement frequency division for timing applications
  5. Design modulus-12 counter for 12-hour clock applications

Vocabulary

Vocabulary (click to expand)
Term Definition
Cascading Connecting counters in series to extend their range
Frequency Division Dividing an input frequency by an integer
Now Serving Display A digital display showing the next number in a queue
Seven-Segment Decoder An IC that converts binary/BCD to 7-segment display signals
Multiplexing Time-sharing a resource between multiple users

Part 1: Real-World Counter Applications

Counters are everywhere in everyday digital devices. Here are some common applications:

Digital Clocks

Digital clocks use counters to keep time: - 60 Hz (or 50 Hz) power line frequency β†’ divided to get seconds - Seconds counter: divide by 60 β†’ minutes - Minutes counter: divide by 60 β†’ hours - Hours counter: divide by 12 (or 24)

Event Counters

Used to count items on assembly lines, visitors entering a building, or pulses from sensors.

Frequency Dividers

Each toggle flip-flop divides the input frequency by 2: - Input: 1 MHz β†’ Γ·2 β†’ 500 kHz β†’ Γ·2 β†’ 250 kHz β†’ Γ·2 β†’ 125 kHz - Useful for generating different clock speeds in computers

Timers and Stopwatches

Counters increment at regular intervals to measure elapsed time.

Queue Management Systems

"Now Serving" displays at delis, banks, and doctor offices use counters to show the next number in line.

Key insight: The "Now Serving" display is a perfect project for learning counter design because it combines counting, display decoding, and reset logic in one practical system.


Part 2: Frequency Division Explained

When flip-flops toggle, they divide the input frequency by 2.

Frequency Division Chain

Input:   1 Hz (1 pulse per second)

After Γ·2:   0.5 Hz (1 pulse every 2 seconds)

After Γ·4:   0.25 Hz (1 pulse every 4 seconds)

After Γ·8:   0.125 Hz (1 pulse every 8 seconds)

After Γ·16:  0.0625 Hz (1 pulse every 16 seconds)

Practical Example: 1 Hz Clock from 32.768 kHz

Real-time clocks use a 32.768 kHz crystal because it divides evenly by 2^15:

32,768 Hz Γ· 2 = 16,384 Hz
Γ· 2 = 8,192 Hz
Γ· 2 = 4,096 Hz
Γ· 2 = 2,048 Hz
Γ· 2 = 1,024 Hz
Γ· 2 = 512 Hz
Γ· 2 = 256 Hz
Γ· 2 = 128 Hz
Γ· 2 = 64 Hz
Γ· 2 = 32 Hz
Γ· 2 = 16 Hz
Γ· 2 = 8 Hz
Γ· 2 = 4 Hz
Γ· 2 = 2 Hz
Γ· 2 = 1 Hz βœ“

Frequency Division Table

Number of Flip-Flops Division Factor Output Frequency
1 2 f/2
2 4 f/4
3 8 f/8
4 16 f/16
n 2^n f/2^n

Part 3: Cascading Counters for Multi-Digit Display

To display two digits (00-99), we need to cascade two counters.

Concept

          β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”
          β”‚    Units Counter    β”‚ (counts 0-9)
  Clock ───   (Mod-10, 74LS90)  β”œβ”€ Q0-Q3 ──▢ 7447 ──▢ 7-seg
          β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜
                 β”‚ Q3 (carry)
                 β”‚ (triggers at 9β†’0)
                 β–Ό
          β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”
          β”‚    Tens Counter     β”‚ (counts 0-9)
          β”‚   (Mod-10, 74LS90)  β”‚
          β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜
                  Q0-Q3 ──▢ 7447 ──▢ 7-seg

How Cascading Works

  1. Units counter increments on each clock pulse
  2. When units counter reaches 9 (1001) and receives next clock:
  3. It resets to 0
  4. Q3 goes HIGH (carry signal)
  5. Tens counter increments on this carry signal
  6. After 99, both counters reset on the next clock

Timing Diagram (Tens and Units)

Clock:   ──┐  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”  β”Œβ”€β”
           β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚  β”‚ β”‚
           β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”€β”˜ β””β”€β”˜

Units:   0  1  2  3  4  5  6  7  8  9  0  1  2  3  4  5  6  7  8  9
Tens:    0  0  0  0  0  0  0  0  0  0  1  1  1  1  1  1  1  1  1  1

Part 4: Connecting Counters to 7-Segment Displays

The 7447 BCD-to-7-Segment Decoder

The 7447 takes BCD input and produces outputs to drive a 7-segment display.

Pin Connections

         β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”
      A  ──  7          14   β”œβ”€ VCC
      B  ──  8   7447   13   β”œβ”€ LT' (lamp test)
      C  ──  9         12   β”œβ”€ RBI' (ripple blanking)
      D  ── 10         11   β”œβ”€ BI'/RBO'
         β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜

Input/Output Mapping

Input D Input C Input B Input A Display
0 0 0 0 0
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 1 1 1 7
1 0 0 0 8
1 0 0 1 9

Complete Display Circuit

Counter ──▢ 7447 ──▢ Resistor ──▢ 7-Segment Display
(BCD)      Decoder     (330Ξ©)     (Common Anode)

         β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”
Counter ── A       aβ”œβ”€ 330Ξ© ──▢ a segment
BCD      ─ B       bβ”œβ”€ 330Ξ© ──▢ b segment
Output   ─ C       cβ”œβ”€ 330Ξ© ──▢ c segment
         ─ D       dβ”œβ”€ 330Ξ© ──▢ d segment
         ─         eβ”œβ”€ 330Ξ© ──▢ e segment
         β”‚         fβ”œβ”€ 330Ξ© ──▢ f segment
         β”‚         gβ”œβ”€ 330Ξ© ──▢ g segment
         β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜

Key insight: The 7447 is designed for common anode displays. Its outputs are active LOW (sink current to light segments).


Part 5: Designing the Now Serving Display

A "Now Serving" display shows the next number in a queue. This is essentially a counter with display output.

Design Requirements

  1. Counter that increments when a ticket button is pressed
  2. Display showing current number (00-99)
  3. Reset button to return to 00

Block Diagram

β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”    β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”    β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”    β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”
β”‚ Ticket      β”‚    β”‚ 74LS90   β”‚    β”‚ 74LS90   β”‚    β”‚ 7447 x2       β”‚
β”‚ Button ─────────▢│ Units    │───▢│ Tens     │───▢│ Decoders       β”‚
β”‚             β”‚    β”‚ Counter  β”‚    β”‚ Counter  β”‚    β”‚                β”‚
β”‚ Reset       β”‚    β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜    β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜    β””β”€β”€β”€β”€β”€β”€β”€β”¬β”€β”€β”€β”€β”€β”€β”€β”€β”˜
β”‚ Button ───────────────── (async clear)                 β”‚
β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜                                            β”‚
                                                             β–Ό
                                                      7-Segment x2

Implementation Steps

  1. Wire two 74LS90 counters cascaded together
  2. Connect two 7447 decoders to counter outputs
  3. Wire two 7-segment displays (common anode)
  4. Add current limiting resistors (330Ξ©) on each segment
  5. Add ticket button to clock input (with debounce circuit)
  6. Add reset button to clear inputs

Debounce Circuit

Mechanical buttons "bounce" when pressed, causing multiple counts. Use a debounce circuit:

Button ──▢ RC Filter ──▢ Schmitt Trigger ──▢ Clock
         (removes bounce)

Part 6: Mod-12 Counter (12-Hour Clock)

Digital clocks that display 12-hour format need a mod-12 counter for hours.

Design Requirements

  • Count from 1 to 12
  • Reset to 1 after 12

Binary States for Hours

Hour Q3 Q2 Q1 Q0 Decimal
1 0 0 0 1 1
2 0 0 1 0 2
3 0 0 1 1 3
4 0 1 0 0 4
5 0 1 0 1 5
6 0 1 1 0 6
7 0 1 1 1 7
8 1 0 0 0 8
9 1 0 0 1 9
10 1 0 1 0 10 (1010)
11 1 0 1 1 11 (1011)
12 1 1 0 0 12 (1100)
13 β†’ β†’ β†’ β†’ Reset to 1

Reset Logic

We need to reset when count = 13 (1101). But we want to display 12 (1100), not 13.

Actually, the better approach is: - Count 1-12 - Detect count 13 β†’ reset to 1

Count 13 = 1101 (Q3=1, Q2=1, Q0=1, Q1=0)

Reset logic: Q3 AND Q2 AND Q1' AND Q0

        Q3 ────┐
                β”œβ”€ NAND ──▢ CLR
        Q2 ─────     (inverted Q1)
                β”‚
   Q1' ──────────
                β”‚
        Q0 β”€β”€β”€β”€β”€β”˜

But this is complex. Simpler: Reset on 13 (or beyond).

Alternative: Use Mod-13 Counter, Add Logic to Show 12

  1. Counter goes 0-12
  2. At count 12: show "12"
  3. At next clock: reset to 0 and display "1"

This is simpler!

Key insight: 12-hour clock counters are tricky because they don't start at 0. Consider using a Mod-13 counter and adding offset logic to display 1-12.


Practice Problem β€” Design a Mod-12 Counter

Design a counter that counts 1, 2, 3, ... 11, 12, then resets to 1.

  1. How many flip-flops are needed?
  2. What is the reset condition?
  3. Draw the reset logic.
Show Solution
1. Need 4 flip-flops (to represent 12 = 1100)

2. Counter sequence:
   0001 = 1
   0010 = 2
   0011 = 3
   0100 = 4
   0101 = 5
   0110 = 6
   0111 = 7
   1000 = 8
   1001 = 9
   1010 = 10
   1011 = 11
   1100 = 12
   Next β†’ 0001 (reset to 1)

3. Reset condition: 
   - At 12 (1100), we want to go to 1 (0001)
   - Actually, simpler: Count 0-12, reset to 1

   Use Mod-13 counter:
   - Reset when 1101 (13) is detected

   Or: Reset at 13 (1301 in 4+ bits doesn't exist)

   Reset = Q3 AND Q2 AND Q1' AND Q0
         = Q3 β€’ Q2 β€’ Q1' β€’ Q0

   Truth table for reset (13 = 1101):
   - Q3 = 1 (at 8-15)
   - Q2 = 1 (at 12-15)
   - Q1 = 0 (at 8-11... but wait, 12=1100 has Q1=0!)
   - Q0 = 1 (odd numbers)

   Hmm, 13 (1101): Q3=1, Q2=1, Q1=0, Q0=1

   Reset condition: Q3 AND Q2 AND NOT Q1 AND Q0

Part 7: Advanced Now Serving Features

Optional Enhancements

  1. Multiple Digits β€” Add more counters for 3-digit (000-999)
  2. Auto-Increment β€” Timer that automatically advances number
  3. Multiple Displays β€” Show "Now Serving" and "Next"
  4. Sound β€” Beep when number changes

Auto-Increment Circuit

Clock ──▢ Frequency ──▢ Divide ──▢ Counter
(1 Hz)   Divider    by 60   Increment

Use a 555 timer or crystal oscillator for clock source.


Part 8: Complete Circuit Example

Parts List

Part Quantity Purpose
74LS90 2 Counters (units and tens)
7447 2 BCD to 7-segment decoders
7-segment display 2 LED displays (common anode)
330Ξ© resistor 14 Current limiting
Push button (N.O.) 1 Ticket increment
Push button (N.C.) 1 Reset

Circuit Diagram (Simplified)

        Ticket Button
             β”‚
             └──▢ Clock (74LS90 #1)

        Reset Button
             β”‚
             └──▢ R0(1), R0(2) on both counters

74LS90 #1:    Q0,Q1,Q2,Q3 ──▢ 7447 #1 ──▢ 7-seg (units)
   (Units)         β”‚ Q3'
                   β”‚
                   └──▢ Clock (74LS90 #2)

74LS90 #2:    Q0,Q1,Q2,Q3 ──▢ 7447 #2 ──▢ 7-seg (tens)
   (Tens)

Summary

Key takeaways from this lesson:

  1. Counters have many real-world uses: clocks, event counting, frequency division
  2. Cascading counters extends their range (two mod-10 = 00-99)
  3. 7447 decoder converts BCD to 7-segment signals
  4. Mod-12 counter is needed for 12-hour clock hours display
  5. Now Serving displays combine counters, decoders, and displays

Key Reminders

  • Use current-limiting resistors (330Ξ©) for each segment
  • Counters cascade via the MSB (most significant bit) output
  • 7447 outputs are active LOW for common anode displays
  • Mechanical buttons need debouncing to prevent false counts
  • Consider starting conditions when designing counters for clocks

πŸ“ Design Challenge β€” Now Serving Display Project

Build a complete Now Serving Display:

Component Description
Display Two 7-segment digits (00-99)
Input Push button to increment
Reset Push button to clear to 00
Documentation Truth table, circuit diagram

Custom activity β€” adapted from PLTW Digital Electronics