Activity 3.2.3 — Modulus Counters & Now Serving Display¶

Learning Objectives¶

By the end of this lesson, students will be able to:

Explain what a modulus (mod-N) counter is and how it differs from a standard binary counter
Design a mod-N counter using flip-flops and determine the required number of flip-flops
Calculate the reset logic needed to create a mod-N counter using a NAND gate
Build a two-digit "Now Serving" display using cascaded counters and 7-segment displays

Vocabulary¶

Vocabulary (click to expand)

Term	Definition
Modulus (mod-N)	A counter that counts from 0 to N-1, then resets back to 0
Modulus Number (N)	The number of unique states in a modulus counter (e.g., mod-6 has 6 states: 0-5)
Decade Counter	A mod-10 counter that counts from 0 to 9
Cascading	Connecting counters in series so one triggers the next after reaching its maximum count
74LS90	A commonly used IC that contains a built-in decade counter
BCD (Binary Coded Decimal)	A 4-bit code that represents decimal digits 0-9

Part 1: Understanding Modulus Counters¶

A modulus counter (or mod-N counter) is a special type of counter that does not count to the maximum possible value for its number of flip-flops. Instead, it counts from 0 up to N-1, then resets back to 0.

Why Use Modulus Counters?¶

Standard binary counters with n flip-flops count from 0 to 2^n - 1: - 2 flip-flops: counts 0 to 3 (mod-4) - 3 flip-flops: counts 0 to 7 (mod-8) - 4 flip-flops: counts 0 to 15 (mod-16)

But what if you need a counter that counts from 0 to 5 (mod-6) for a clock's seconds? Or 0 to 9 (mod-10) for a decimal display? This is where modulus counters come in.

How to Design a Mod-N Counter¶

Follow these steps to design a mod-N counter:

Determine the number of flip-flops: Find the smallest n where 2^n >= N
Draw the state diagram: Show all states from 0 to N-1
Create the state table: List each state and the next state
Determine reset logic: Find which binary value triggers the reset (value N)

Key insight: The key to designing a mod-N counter is detecting when the counter reaches state N, then using that signal to reset all flip-flops back to 0. This is typically done with a NAND gate.

Part 2: Designing a Mod-6 Counter¶

Let's walk through designing a mod-6 counter, which counts 0, 1, 2, 3, 4, 5, then resets to 0.

Step 1: Determine Flip-Flop Count¶

We need 2^num_flops >= 6: - 2 flip-flops: 2^2 = 4 (not enough) - 3 flip-flops: 2^3 = 8 (enough!)

So we need 3 flip-flops.

Step 2: State Sequence¶

Count	Q2	Q1	Q0
0	0	0	0
1	0	0	1
2	0	1	0
3	0	1	1
4	1	0	0
5	1	0	1

Step 3: Reset Logic¶

When the counter reaches 6 (binary 110), we need to reset all flip-flops: - State 6 = binary 110 - Q2 = 1, Q1 = 1, Q0 = 0

A NAND gate with inputs from Q2 and Q1 will detect when both are HIGH (1), which happens at count 6. This NAND output goes to the CLEAR inputs of all flip-flops.

Reset Logic: NAND(Q2, Q1) → CLEAR

Visual Representation¶

        +--------+
   >----| Q0     |
        | J0 K0  |
   <----| Q0'    |
        +--------+

        +--------+
   >----| Q1     |
        | J1 K1  |
   <----| Q1'    |
        +--------+

        +--------+
   >----| Q2     |
        | J2 K2  |
   <----| Q2'    |
        +--------+

   Q2 ----+---> NAND Gate --> CLEAR (all flip-flops)
   Q1 ----+

Key insight: The NAND gate creates a short reset pulse whenever the counter reaches state N (6 for mod-6), causing all flip-flops to clear back to 000.

Part 3: The Decade Counter (Mod-10)¶

A decade counter is a mod-10 counter that counts from 0 to 9, then resets. This is one of the most common counters because it matches our decimal number system.

Why Decade Counters Matter¶

Digital clocks: counts seconds/minutes 0-59 (requires mod-60, built from decade counters)
Odometers: each digit is a decade counter
Event counters: count up to 9 in each digit position

The 74LS90 Decade Counter IC¶

The 74LS90 is a popular IC that contains a built-in decade (mod-10) counter. It also contains a mod-2 counter, allowing flexible configurations.

Pin Diagram: - A input (clock for mod-2) - B input (clock for mod-5) - QA, QB, QC, QD (outputs - BCD) - R0(1), R0(2) (reset inputs) - R9(1), R9(2) (set to 9 inputs)

Basic Connection: - Connect B to QA for mod-10 operation - Apply HIGH to R0(1) and R0(2) to reset to 0

Mod-10 Reset Logic¶

When count reaches 10 (binary 1010), all outputs should reset to 0: - QD=1, QC=0, QB=1, QA=0

The 74LS90 automatically resets when it reaches 10, outputting 0000.

Part 4: Building a Now Serving Display¶

A "Now Serving" display shows sequential ticket numbers, commonly seen at deli counters, bank windows, and service centers.

Block Diagram¶

Clock (Pushbutton) --> Mod-10 Counter --> 7-Segment Display (Ones)
         |                              |
         V                              |
    (carry out) --> Mod-10 Counter --> 7-Segment Display (Tens)
         |
         V
   Reset Button

Key Components¶

Clock Input: Pushbutton or timer circuit provides counting pulses
Two Mod-10 Counters: Cascaded to count 00-99
7447 BCD-to-7-Segment Decoder: Converts binary to display patterns
7-Segment Displays: Shows the actual digits
Reset Button: Returns display to 00

Cascading Counters¶

When the ones counter reaches 9 and receives another clock pulse: 1. It resets to 0 2. It produces a carry output (ripple) 3. This carry becomes the clock input for the tens counter

This allows two mod-10 counters to create a mod-100 counter.

Circuit Connections¶

74LS90 #1 (Ones):
- Clock input: external clock
- QA-D: connects to 7447 #1 inputs
- QD (carry): connects to Clock of 74LS90 #2

7447 #1:
- Inputs A-D: from 74LS90 #1
- Outputs a-g: to ones 7-segment display

74LS90 #2 (Tens):
- Clock input: from 74LS90 #1 carry
- QA-D: connects to 7447 #2 inputs

7447 #2:
- Inputs A-D: from 74LS90 #2
- Outputs a-g: to tens 7-segment display

Key insight: Cascading multiple mod-10 counters creates a display that can count to any power of 10. Two counters = 0-99, three counters = 0-999.

Practice Problem — Designing a Mod-12 Counter¶

Problem: Design a mod-12 counter that counts from 0 to 11 (like a 12-hour clock). Answer these questions:

How many flip-flops are required?
What is the binary value when the counter reaches 12?
What reset logic (using NAND gates) would detect state 12?
Which outputs would you connect to the NAND gate inputs?

Show Solution

1. Number of flip-flops:
   - 2 flip-flops: 2^2 = 4 (not enough)
   - 3 flip-flops: 2^3 = 8 (not enough)
   - 4 flip-flops: 2^4 = 16 (enough!)
   Answer: 4 flip-flops needed

2. Binary value at count 12:
   12 = 1100 (in binary)
   Q3=1, Q2=1, Q1=0, Q0=0

3. Reset logic for mod-12:
   State 12 has Q3=1 and Q2=1
   NAND(Q3, Q2) will be LOW when both are HIGH
   This occurs only at count 12
   The NAND output clears all flip-flops

4. NAND gate inputs:
   Connect Q3 and Q2 to NAND gate inputs
   When Q3=1 AND Q2=1 → NAND output = 0 → CLEAR

State sequence:
0 (0000), 1 (0001), 2 (0010), 3 (0011), 4 (0100), 5 (0101)
6 (0110), 7 (0111), 8 (1000), 9 (1001), 10 (1010), 11 (1011)
Reset to 0 (0000) on next clock

Practice Problem — Two-Digit Hour Counter¶

Problem: For a 12-hour digital clock, how would you connect three decade (mod-10) counters to count hours from 1-12?

The counters should display: - Hours tens: either 0 or 1 - Hours ones: 1-9 then 0 (mod-10 pattern, but starts at 1) - Minutes: 00-59 (standard two-digit)

What special logic would you need to make the hours display show 12 instead of 00?

Show Solution

Standard approach for 12-hour clock:
1. Minutes counters: two mod-10 counters (00-59)
2. Hours counter: one mod-12 counter (01-12)

The tricky part is the transition from 12 back to 1:
- At 12:59 -> next is 01:00
- Need to detect 12 and reset to 01

Special logic for hours:
- Normal counting: 01, 02, 03, ... 09, 10, 11, 12
- At 12 (binary 1100): need to reset to 01 (binary 0001)

One method:
- Use a mod-12 counter (counts 0-11 internally)
- Add logic to convert:
  - 0 → 12 (when tens digit should show 1)
  - 1-11 → 1-11 (direct)

Alternatively, use a decade counter with extra logic:
- Count 1-9 normally
- At 9, next is 10 (requires detecting 9)
- At 10, next is 11
- At 11, next is 12 (requires detecting both Q3=1, Q2=1, Q1=0, Q0=0)
- At 12, reset to 1

This requires additional combinational logic beyond simple NAND reset.

Summary¶

Modulus counters count from 0 to N-1, then reset to 0
To design a mod-N counter: determine flip-flop count, create state diagram, derive reset logic
Reset logic typically uses a NAND gate to detect when the counter reaches state N
Decade counters (mod-10) are common in digital displays
The 74LS90 IC is a popular decade counter with built-in reset
Cascading mod-10 counters creates multi-digit displays (00-99, 000-999)
7447 decoder converts BCD to 7-segment display signals

Key Reminders¶

The number of flip-flops must satisfy 2^n >= N
A NAND gate detects when all its inputs are HIGH (count N)
Cascading counters multiplies their modulus values (mod-10 × mod-10 = mod-100)
The 74LS90 is a pre-built decade counter — no flip-flop design needed
"Now Serving" displays use cascaded mod-10 counters with 7-segment displays

Custom activity — adapted from PLTW Digital Electronics